Module driver:serial - Generic serial-port infrastructure pseudo device
Generic serial-port infrastructure pseudo device. This provides the 'serial' device tree, with which specific implementations register ports.
Requires:
Used: driver:pcserial driver:umserial
Provides: interface:input interface:output interface:serport
Index
-
Group
UART- UART register offsets-
Constant
UART.ASR- Additional status register -
Constant
UART.BGDH- Baud rate generator (high byte); -
Constant
UART.BGDL- Baud rate generator (low byte) -
Constant
UART.BSR- Bank register select -
Constant
UART.DLL- Baud rate divisor LSB (write when DLAB=1) -
Constant
UART.DLM- Baud rate divisor MSB (write when DLAB=1) -
Constant
UART.EFR- Extended features (read/write when DLAB=1 or LCR=#BF) -
Constant
UART.EXCR1- Extended control register 1 -
Constant
UART.EXCR2- Extended control register 2 -
Constant
UART.FIO- FIFO (write when DLAB=0) -
Constant
UART.ICR- Index control register -
Constant
UART.IER- Interrupt enable (write when DLAB=0) -
Constant
UART.IIR- Interrupt ID (read when DLAB=0) -
Constant
UART.LCR- Line control -
Constant
UART.LSR- Line status -
Constant
UART.MCR- Modem control -
Constant
UART.MSR- Modem status -
Constant
UART.RBR- Receiver data (read when DLAB=0) -
Constant
UART.RFL- Receiver FIFO level -
Constant
UART.RXFLV- Receiver FIFO level (bits 0-5), read-only -
Constant
UART.SCR- Scratch register -
Constant
UART.TFL- Transmitter FIFO level -
Constant
UART.THR- Transmitter holding (write when DLAB=0) -
Constant
UART.TXFLV- Transmitter FIFO level (bits 0-5), read-only
-
Constant
-
Group
UART.BSR- Bank select register bits (NS SuperIO)-
Constant
UART.BSR.BANK0- Bank 0 -
Constant
UART.BSR.BANK1- Bank 1 -
Constant
UART.BSR.BANK1A- Bank 1 (other) -
Constant
UART.BSR.BANK1B- Bank 1 (other) -
Constant
UART.BSR.BANK2- Bank 2 -
Constant
UART.BSR.BANK3- Bank 3 -
Constant
UART.BSR.BANK4- Bank 4 -
Constant
UART.BSR.BANK5- Bank 5 -
Constant
UART.BSR.BANK6- Bank 6 -
Constant
UART.BSR.BANK7- Bank 7
-
Constant
-
Group
UART.CAP- UART capabilities-
Constant
UART.CAP.AFE- UART has MCR-based hardware flow control -
Constant
UART.CAP.EFR- UART has EFR -
Constant
UART.CAP.FIFO- UART has FIFO -
Constant
UART.CAP.NONE- UART has no special capabilities -
Constant
UART.CAP.NS- National Semiconductor UART (additional features) -
Constant
UART.CAP.SLEEP- UART has IER sleep -
Constant
UART.CAP.UUE- UART needs IER bit 6 set (Xscale)
-
Constant
-
Group
UART.EFR- Extended features register (UART.EFR) bits-
Constant
UART.EFR.CTS- CTS flow control -
Constant
UART.EFR.ECB- Enhanced control bit -
Constant
UART.EFR.RTS- RTS flow control -
Constant
UART.EFR.SCD- Special character detect
-
Constant
-
Group
UART.EXCR1- Extended control register 1 bits (NS SuperIO)-
Constant
UART.EXCR1.DMANF- DMA fairness control -
Constant
UART.EXCR1.DMASWP- DMA swap -
Constant
UART.EXCR1.DMATH- DMA FIFO threshold -
Constant
UART.EXCR1.ETLOOP- Enable transmitter during loopback control -
Constant
UART.EXCR1.EXTSL- Extended mode select -
Constant
UART.EXCR1.LOOP- Loopback control
-
Constant
-
Group
UART.EXCR2- Extended control register 2 bits (NS SuperIO)-
Constant
UART.EXCR2.BGLOCK- Baud rate divisor lock -
Constant
UART.EXCR2.PRESL.1- Divide by 1.0 -
Constant
UART.EXCR2.PRESL.13- Divide by 13 -
Constant
UART.EXCR2.PRESL.1625- Divide by 1.625 -
Constant
UART.EXCR2.PRESL.MASK- Baud generator prescalar mask -
Constant
UART.EXCR2.RXFL.MASK- Receiver FIFO level select mask -
Constant
UART.EXCR2.TXFL.MASK- Transmitter FIFO level select mask -
Constant
UART.EXCR2.TXFL16- 16-byte FIFO -
Constant
UART.EXCR2.TXFL16- 16-byte FIFO -
Constant
UART.EXCR2.TXFL32- 32-byte FIFO -
Constant
UART.EXCR2.TXFL32- 32-byte FIFO
-
Constant
-
Group
UART.FIO- FIFO control register (UART.FIO) bits-
Constant
UART.FIO.CLR.RCVR- Clear receiver FIFO -
Constant
UART.FIO.CLR.XMIT- Clear transmit FIFO -
Constant
UART.FIO.DMA.SEL- DMA select -
Constant
UART.FIO.ENABLE- Enable FIFO -
Constant
UART.FIO.RX.TRIG.MASK- RX FIFO trigger level mask -
Constant
UART.FIO.TX.TRIG.MASK- TX FIFO trigger level mask
-
Constant
-
Group
UART.ICR- 16950 index control registers-
Constant
UART.ICR.ACR- Additional control register -
Constant
UART.ICR.CKS- Clock select register -
Constant
UART.ICR.CPR- Clock prescalar register -
Constant
UART.ICR.CSR- Channel software reset -
Constant
UART.ICR.FCH- Flow control level higher -
Constant
UART.ICR.FCL- Flow control level lower -
Constant
UART.ICR.ID1- ID register 1 -
Constant
UART.ICR.ID2- ID register 2 -
Constant
UART.ICR.ID3- ID register 3 -
Constant
UART.ICR.NMR- Nine-bit mode register -
Constant
UART.ICR.REV- Revision -
Constant
UART.ICR.RTL- Receiver interrupt trigger level -
Constant
UART.ICR.TCR- Times clock register -
Constant
UART.ICR.TTL- Transmitter interrupt trigger level
-
Constant
-
Group
UART.ICR.ACR- 19C950 additional control register-
Constant
UART.ICR.ACR.ASREN- Additional status enable -
Constant
UART.ICR.ACR.DSRFC- DSR flow control -
Constant
UART.ICR.ACR.ICRRD- ICR read enable -
Constant
UART.ICR.ACR.RXDIS- Receiver disable -
Constant
UART.ICR.ACR.TLENB- 950 trigger levels enable -
Constant
UART.ICR.ACR.TXDIS- Transmitter disable
-
Constant
-
Group
UART.IER- Interrupt enable register (UART.IER) bits-
Constant
UART.IER.ENMASK- Mask for interrupt enable bits -
Constant
UART.IER.MSI- Enable modem status interrupt -
Constant
UART.IER.RDI- Enable receiver data interrupt -
Constant
UART.IER.RLSI- Enable receiver line status interrupt -
Constant
UART.IER.THRI- Enable transmitter holding register interrupt
-
Constant
-
Group
UART.IIR- Interrupt ID register (UART.IIR) bits-
Constant
UART.IIR.BUSY- DesignWare APB busy detect -
Constant
UART.IIR.ID.MASK- Mask for interrupt ID -
Constant
UART.IIR.MSI- Modem status interrupt -
Constant
UART.IIR.NOINT- No interrupts pending -
Constant
UART.IIR.RDI- Receiver data interrupt -
Constant
UART.IIR.RLSI- Receiver line status interrupt -
Constant
UART.IIR.THRI- Transmitter holding register empty
-
Constant
-
Group
UART.LCR- Line control register (UART.LCR) bits-
Constant
UART.LCR.ACCESS.EFR- Allow access to extended feature register -
Constant
UART.LCR.DLAB- Divisor latch access (also bank register select) -
Constant
UART.LCR.EPAR- Even parity select -
Constant
UART.LCR.PARITY- Parity enable -
Constant
UART.LCR.SBC- Set break control -
Constant
UART.LCR.SPAR- Space parity -
Constant
UART.LCR.STOP- Stop bits (0=1-bit, 1=2-bits) -
Constant
UART.LCR.WLEN5- 5-bit word-length -
Constant
UART.LCR.WLEN6- 6-bit word-length -
Constant
UART.LCR.WLEN7- 7-bit word-length -
Constant
UART.LCR.WLEN8- 8-bit word-length
-
Constant
-
Group
UART.LSR- Line status register (UART.LSR) bits-
Constant
UART.LSR.BI- Break interrupt indicator -
Constant
UART.LSR.BRK- Break error bits (BI,FE,PE,OE) -
Constant
UART.LSR.DR- Receiver data ready -
Constant
UART.LSR.FE- Frame error indicator -
Constant
UART.LSR.OE- Overrun error indicator -
Constant
UART.LSR.PE- Parirt error indicator -
Constant
UART.LSR.TEMT- Transmitter empty -
Constant
UART.LSR.THRE- Transmit holding register empty
-
Constant
-
Group
UART.MCR- Modem control register (UART.MCR) bits-
Constant
UART.MCR.AFE- Enable auto-RTS/CTS flow-control -
Constant
UART.MCR.CLKSEL- Divide clock by 4 -
Constant
UART.MCR.DTR- DTR complement -
Constant
UART.MCR.LOOP- Enable loopback test mode -
Constant
UART.MCR.OUT1- Out1 complement -
Constant
UART.MCR.OUT2- Out2 complement -
Constant
UART.MCR.RTS- RTS complement -
Constant
UART.MCR.TCRTLR- Access TCR/TLR -
Constant
UART.MCR.XONANY- Enable Xon any
-
Constant
-
Group
UART.MSR- Modem status register (UART.MSR) bits-
Constant
UART.MSR.ANYDELTA- Any delta bits -
Constant
UART.MSR.BITMASK- Mask for any indicators -
Constant
UART.MSR.CTS- Clear to send -
Constant
UART.MSR.DCD- Data carrier detect -
Constant
UART.MSR.DCTS- Delta CTS -
Constant
UART.MSR.DDCD- Delta DCD -
Constant
UART.MSR.DDSR- Delta DSR -
Constant
UART.MSR.DSR- Data set ready -
Constant
UART.MSR.RI- Ring indicator -
Constant
UART.MSR.TERI- Trailing edge ring indicator
-
Constant
-
Group
UART.PARITY- UART parity settings -
Group
UART.STOP- UART stop bits settings -
Group
UART.TYPE- Known UART types-
Constant
UART.TYPE.16450- 16450 -
Constant
UART.TYPE.16550- 16550 -
Constant
UART.TYPE.16550A- 16550A -
Constant
UART.TYPE.16650- 16650 -
Constant
UART.TYPE.16650V2- 16650 version 2 -
Constant
UART.TYPE.16654- 16654 -
Constant
UART.TYPE.16750- 16750 UART -
Constant
UART.TYPE.16850- XR16C850 -
Constant
UART.TYPE.16C950- Oxford Semiconductor 16C950 -
Constant
UART.TYPE.8250- Standard 8250 compatible UART -
Constant
UART.TYPE.NS16550A- NS 16550A -
Constant
UART.TYPE.UNKNOWN- Unknown UART type (assume basic)
-
Constant
-
Group
UART.WLEN- UART word-length settings -
Process
serial.driver- Serial-port infrastructure process
Declarations
pcuart.inc:25Group UART
UART register offsets.
pcuart.inc:26Constant UART.THR
VAL INT UART.THR
Transmitter holding (write when DLAB=0).
pcuart.inc:27Constant UART.RBR
VAL INT UART.RBR
Receiver data (read when DLAB=0).
pcuart.inc:29Constant UART.DLL
VAL INT UART.DLL
Baud rate divisor LSB (write when DLAB=1).
pcuart.inc:30Constant UART.DLM
VAL INT UART.DLM
Baud rate divisor MSB (write when DLAB=1).
pcuart.inc:32Constant UART.IER
VAL INT UART.IER
Interrupt enable (write when DLAB=0).
pcuart.inc:33Constant UART.IIR
VAL INT UART.IIR
Interrupt ID (read when DLAB=0).
pcuart.inc:34Constant UART.FIO
VAL INT UART.FIO
FIFO (write when DLAB=0).
pcuart.inc:35Constant UART.EFR
VAL INT UART.EFR
Extended features (read/write when DLAB=1 or LCR=#BF).
pcuart.inc:37Constant UART.LCR
VAL INT UART.LCR
Line control.
pcuart.inc:38Constant UART.MCR
VAL INT UART.MCR
Modem control.
pcuart.inc:39Constant UART.LSR
VAL INT UART.LSR
Line status.
pcuart.inc:40Constant UART.MSR
VAL INT UART.MSR
Modem status.
pcuart.inc:41Constant UART.SCR
VAL INT UART.SCR
Scratch register.
pcuart.inc:44Constant UART.ASR
VAL INT UART.ASR
Additional status register.
pcuart.inc:45Constant UART.RFL
VAL INT UART.RFL
Receiver FIFO level.
pcuart.inc:46Constant UART.TFL
VAL INT UART.TFL
Transmitter FIFO level.
pcuart.inc:47Constant UART.ICR
VAL INT UART.ICR
Index control register.
pcuart.inc:50Constant UART.BSR
VAL INT UART.BSR
Bank register select.
pcuart.inc:53Constant UART.BGDL
VAL INT UART.BGDL
Baud rate generator (low byte).
pcuart.inc:54Constant UART.BGDH
VAL INT UART.BGDH
Baud rate generator (high byte);
pcuart.inc:55Constant UART.EXCR1
VAL INT UART.EXCR1
Extended control register 1.
pcuart.inc:56Constant UART.EXCR2
VAL INT UART.EXCR2
Extended control register 2.
pcuart.inc:57Constant UART.TXFLV
VAL INT UART.TXFLV
Transmitter FIFO level (bits 0-5), read-only.
pcuart.inc:58Constant UART.RXFLV
VAL INT UART.RXFLV
Receiver FIFO level (bits 0-5), read-only.
pcuart.inc:61Group UART.IER
Interrupt enable register (UART.IER) bits.
pcuart.inc:62Constant UART.IER.MSI
VAL BYTE UART.IER.MSI
Enable modem status interrupt.
pcuart.inc:63Constant UART.IER.RLSI
VAL BYTE UART.IER.RLSI
Enable receiver line status interrupt.
pcuart.inc:64Constant UART.IER.THRI
VAL BYTE UART.IER.THRI
Enable transmitter holding register interrupt.
pcuart.inc:65Constant UART.IER.RDI
VAL BYTE UART.IER.RDI
Enable receiver data interrupt.
pcuart.inc:66Constant UART.IER.ENMASK
VAL BYTE UART.IER.ENMASK
Mask for interrupt enable bits.
pcuart.inc:69Group UART.IIR
Interrupt ID register (UART.IIR) bits.
pcuart.inc:70Constant UART.IIR.NOINT
VAL BYTE UART.IIR.NOINT
No interrupts pending.
pcuart.inc:71Constant UART.IIR.ID.MASK
VAL BYTE UART.IIR.ID.MASK
Mask for interrupt ID.
pcuart.inc:72Constant UART.IIR.MSI
VAL BYTE UART.IIR.MSI
Modem status interrupt.
pcuart.inc:73Constant UART.IIR.THRI
VAL BYTE UART.IIR.THRI
Transmitter holding register empty.
pcuart.inc:74Constant UART.IIR.RDI
VAL BYTE UART.IIR.RDI
Receiver data interrupt.
pcuart.inc:75Constant UART.IIR.RLSI
VAL BYTE UART.IIR.RLSI
Receiver line status interrupt.
pcuart.inc:76Constant UART.IIR.BUSY
VAL BYTE UART.IIR.BUSY
DesignWare APB busy detect.
pcuart.inc:79Group UART.FIO
FIFO control register (UART.FIO) bits.
pcuart.inc:80Constant UART.FIO.ENABLE
VAL BYTE UART.FIO.ENABLE
Enable FIFO.
pcuart.inc:81Constant UART.FIO.CLR.RCVR
VAL BYTE UART.FIO.CLR.RCVR
Clear receiver FIFO.
pcuart.inc:82Constant UART.FIO.CLR.XMIT
VAL BYTE UART.FIO.CLR.XMIT
Clear transmit FIFO.
pcuart.inc:83Constant UART.FIO.DMA.SEL
VAL BYTE UART.FIO.DMA.SEL
DMA select.
pcuart.inc:85Constant UART.FIO.RX.TRIG.MASK
VAL BYTE UART.FIO.RX.TRIG.MASK
RX FIFO trigger level mask.
pcuart.inc:86Constant UART.FIO.TX.TRIG.MASK
VAL BYTE UART.FIO.TX.TRIG.MASK
TX FIFO trigger level mask.
pcuart.inc:89Group UART.EFR
Extended features register (UART.EFR) bits.
pcuart.inc:90Constant UART.EFR.CTS
VAL BYTE UART.EFR.CTS
CTS flow control.
pcuart.inc:91Constant UART.EFR.RTS
VAL BYTE UART.EFR.RTS
RTS flow control.
pcuart.inc:92Constant UART.EFR.SCD
VAL BYTE UART.EFR.SCD
Special character detect.
pcuart.inc:93Constant UART.EFR.ECB
VAL BYTE UART.EFR.ECB
Enhanced control bit.
pcuart.inc:96Group UART.LCR
Line control register (UART.LCR) bits.
pcuart.inc:97Constant UART.LCR.DLAB
VAL BYTE UART.LCR.DLAB
Divisor latch access (also bank register select).
pcuart.inc:98Constant UART.LCR.SBC
VAL BYTE UART.LCR.SBC
Set break control.
pcuart.inc:99Constant UART.LCR.SPAR
VAL BYTE UART.LCR.SPAR
Space parity.
pcuart.inc:100Constant UART.LCR.EPAR
VAL BYTE UART.LCR.EPAR
Even parity select.
pcuart.inc:101Constant UART.LCR.PARITY
VAL BYTE UART.LCR.PARITY
Parity enable.
pcuart.inc:102Constant UART.LCR.STOP
VAL BYTE UART.LCR.STOP
Stop bits (0=1-bit, 1=2-bits).
pcuart.inc:103Constant UART.LCR.WLEN5
VAL BYTE UART.LCR.WLEN5
5-bit word-length.
pcuart.inc:104Constant UART.LCR.WLEN6
VAL BYTE UART.LCR.WLEN6
6-bit word-length.
pcuart.inc:105Constant UART.LCR.WLEN7
VAL BYTE UART.LCR.WLEN7
7-bit word-length.
pcuart.inc:106Constant UART.LCR.WLEN8
VAL BYTE UART.LCR.WLEN8
8-bit word-length.
pcuart.inc:108Constant UART.LCR.ACCESS.EFR
VAL BYTE UART.LCR.ACCESS.EFR
Allow access to extended feature register.
pcuart.inc:111Group UART.MCR
Modem control register (UART.MCR) bits.
pcuart.inc:112Constant UART.MCR.CLKSEL
VAL BYTE UART.MCR.CLKSEL
Divide clock by 4.
pcuart.inc:113Constant UART.MCR.TCRTLR
VAL BYTE UART.MCR.TCRTLR
Access TCR/TLR.
pcuart.inc:114Constant UART.MCR.XONANY
VAL BYTE UART.MCR.XONANY
Enable Xon any.
pcuart.inc:115Constant UART.MCR.AFE
VAL BYTE UART.MCR.AFE
Enable auto-RTS/CTS flow-control.
pcuart.inc:116Constant UART.MCR.LOOP
VAL BYTE UART.MCR.LOOP
Enable loopback test mode.
pcuart.inc:117Constant UART.MCR.OUT2
VAL BYTE UART.MCR.OUT2
Out2 complement.
pcuart.inc:118Constant UART.MCR.OUT1
VAL BYTE UART.MCR.OUT1
Out1 complement.
pcuart.inc:119Constant UART.MCR.RTS
VAL BYTE UART.MCR.RTS
RTS complement.
pcuart.inc:120Constant UART.MCR.DTR
VAL BYTE UART.MCR.DTR
DTR complement.
pcuart.inc:123Group UART.LSR
Line status register (UART.LSR) bits.
pcuart.inc:124Constant UART.LSR.TEMT
VAL BYTE UART.LSR.TEMT
Transmitter empty.
pcuart.inc:125Constant UART.LSR.THRE
VAL BYTE UART.LSR.THRE
Transmit holding register empty.
pcuart.inc:126Constant UART.LSR.BI
VAL BYTE UART.LSR.BI
Break interrupt indicator.
pcuart.inc:127Constant UART.LSR.FE
VAL BYTE UART.LSR.FE
Frame error indicator.
pcuart.inc:128Constant UART.LSR.PE
VAL BYTE UART.LSR.PE
Parirt error indicator.
pcuart.inc:129Constant UART.LSR.OE
VAL BYTE UART.LSR.OE
Overrun error indicator.
pcuart.inc:130Constant UART.LSR.DR
VAL BYTE UART.LSR.DR
Receiver data ready.
pcuart.inc:131Constant UART.LSR.BRK
VAL BYTE UART.LSR.BRK
Break error bits (BI,FE,PE,OE).
pcuart.inc:134Group UART.MSR
Modem status register (UART.MSR) bits.
pcuart.inc:135Constant UART.MSR.DCD
VAL BYTE UART.MSR.DCD
Data carrier detect.
pcuart.inc:136Constant UART.MSR.RI
VAL BYTE UART.MSR.RI
Ring indicator.
pcuart.inc:137Constant UART.MSR.DSR
VAL BYTE UART.MSR.DSR
Data set ready.
pcuart.inc:138Constant UART.MSR.CTS
VAL BYTE UART.MSR.CTS
Clear to send.
pcuart.inc:139Constant UART.MSR.BITMASK
VAL BYTE UART.MSR.BITMASK
Mask for any indicators.
pcuart.inc:140Constant UART.MSR.DDCD
VAL BYTE UART.MSR.DDCD
Delta DCD.
pcuart.inc:141Constant UART.MSR.TERI
VAL BYTE UART.MSR.TERI
Trailing edge ring indicator.
pcuart.inc:142Constant UART.MSR.DDSR
VAL BYTE UART.MSR.DDSR
Delta DSR.
pcuart.inc:143Constant UART.MSR.DCTS
VAL BYTE UART.MSR.DCTS
Delta CTS.
pcuart.inc:144Constant UART.MSR.ANYDELTA
VAL BYTE UART.MSR.ANYDELTA
Any delta bits.
pcuart.inc:147Group UART.ICR
16950 index control registers.
pcuart.inc:148Constant UART.ICR.ACR
VAL BYTE UART.ICR.ACR
Additional control register.
pcuart.inc:149Constant UART.ICR.CPR
VAL BYTE UART.ICR.CPR
Clock prescalar register.
pcuart.inc:150Constant UART.ICR.TCR
VAL BYTE UART.ICR.TCR
Times clock register.
pcuart.inc:151Constant UART.ICR.CKS
VAL BYTE UART.ICR.CKS
Clock select register.
pcuart.inc:152Constant UART.ICR.TTL
VAL BYTE UART.ICR.TTL
Transmitter interrupt trigger level.
pcuart.inc:153Constant UART.ICR.RTL
VAL BYTE UART.ICR.RTL
Receiver interrupt trigger level.
pcuart.inc:154Constant UART.ICR.FCL
VAL BYTE UART.ICR.FCL
Flow control level lower.
pcuart.inc:155Constant UART.ICR.FCH
VAL BYTE UART.ICR.FCH
Flow control level higher.
pcuart.inc:156Constant UART.ICR.ID1
VAL BYTE UART.ICR.ID1
ID register 1.
pcuart.inc:157Constant UART.ICR.ID2
VAL BYTE UART.ICR.ID2
ID register 2.
pcuart.inc:158Constant UART.ICR.ID3
VAL BYTE UART.ICR.ID3
ID register 3.
pcuart.inc:159Constant UART.ICR.REV
VAL BYTE UART.ICR.REV
Revision.
pcuart.inc:160Constant UART.ICR.CSR
VAL BYTE UART.ICR.CSR
Channel software reset.
pcuart.inc:161Constant UART.ICR.NMR
VAL BYTE UART.ICR.NMR
Nine-bit mode register.
pcuart.inc:165Group UART.ICR.ACR
19C950 additional control register.
pcuart.inc:166Constant UART.ICR.ACR.RXDIS
VAL BYTE UART.ICR.ACR.RXDIS
Receiver disable.
pcuart.inc:167Constant UART.ICR.ACR.TXDIS
VAL BYTE UART.ICR.ACR.TXDIS
Transmitter disable.
pcuart.inc:168Constant UART.ICR.ACR.DSRFC
VAL BYTE UART.ICR.ACR.DSRFC
DSR flow control.
pcuart.inc:169Constant UART.ICR.ACR.TLENB
VAL BYTE UART.ICR.ACR.TLENB
950 trigger levels enable.
pcuart.inc:170Constant UART.ICR.ACR.ICRRD
VAL BYTE UART.ICR.ACR.ICRRD
ICR read enable.
pcuart.inc:171Constant UART.ICR.ACR.ASREN
VAL BYTE UART.ICR.ACR.ASREN
Additional status enable.
pcuart.inc:174Group UART.BSR
Bank select register bits (NS SuperIO).
pcuart.inc:175Constant UART.BSR.BANK0
VAL BYTE UART.BSR.BANK0
Bank 0.
pcuart.inc:176Constant UART.BSR.BANK1
VAL BYTE UART.BSR.BANK1
Bank 1.
pcuart.inc:177Constant UART.BSR.BANK1A
VAL BYTE UART.BSR.BANK1A
Bank 1 (other).
pcuart.inc:178Constant UART.BSR.BANK1B
VAL BYTE UART.BSR.BANK1B
Bank 1 (other).
pcuart.inc:179Constant UART.BSR.BANK2
VAL BYTE UART.BSR.BANK2
Bank 2.
pcuart.inc:180Constant UART.BSR.BANK3
VAL BYTE UART.BSR.BANK3
Bank 3.
pcuart.inc:181Constant UART.BSR.BANK4
VAL BYTE UART.BSR.BANK4
Bank 4.
pcuart.inc:182Constant UART.BSR.BANK5
VAL BYTE UART.BSR.BANK5
Bank 5.
pcuart.inc:183Constant UART.BSR.BANK6
VAL BYTE UART.BSR.BANK6
Bank 6.
pcuart.inc:184Constant UART.BSR.BANK7
VAL BYTE UART.BSR.BANK7
Bank 7.
pcuart.inc:187Group UART.EXCR1
Extended control register 1 bits (NS SuperIO).
pcuart.inc:188Constant UART.EXCR1.EXTSL
VAL BYTE UART.EXCR1.EXTSL
Extended mode select.
pcuart.inc:189Constant UART.EXCR1.DMANF
VAL BYTE UART.EXCR1.DMANF
DMA fairness control.
pcuart.inc:190Constant UART.EXCR1.DMATH
VAL BYTE UART.EXCR1.DMATH
DMA FIFO threshold.
pcuart.inc:191Constant UART.EXCR1.DMASWP
VAL BYTE UART.EXCR1.DMASWP
DMA swap.
pcuart.inc:192Constant UART.EXCR1.LOOP
VAL BYTE UART.EXCR1.LOOP
Loopback control.
pcuart.inc:193Constant UART.EXCR1.ETLOOP
VAL BYTE UART.EXCR1.ETLOOP
Enable transmitter during loopback control.
pcuart.inc:196Group UART.EXCR2
Extended control register 2 bits (NS SuperIO).
pcuart.inc:197Constant UART.EXCR2.TXFL.MASK
VAL BYTE UART.EXCR2.TXFL.MASK
Transmitter FIFO level select mask.
pcuart.inc:198Constant UART.EXCR2.TXFL16
VAL BYTE UART.EXCR2.TXFL16
16-byte FIFO.
pcuart.inc:199Constant UART.EXCR2.TXFL32
VAL BYTE UART.EXCR2.TXFL32
32-byte FIFO.
pcuart.inc:200Constant UART.EXCR2.RXFL.MASK
VAL BYTE UART.EXCR2.RXFL.MASK
Receiver FIFO level select mask.
pcuart.inc:201Constant UART.EXCR2.TXFL16
VAL BYTE UART.EXCR2.TXFL16
16-byte FIFO.
pcuart.inc:202Constant UART.EXCR2.TXFL32
VAL BYTE UART.EXCR2.TXFL32
32-byte FIFO.
pcuart.inc:203Constant UART.EXCR2.PRESL.MASK
VAL BYTE UART.EXCR2.PRESL.MASK
Baud generator prescalar mask.
pcuart.inc:204Constant UART.EXCR2.PRESL.13
VAL BYTE UART.EXCR2.PRESL.13
Divide by 13. (default).
pcuart.inc:205Constant UART.EXCR2.PRESL.1625
VAL BYTE UART.EXCR2.PRESL.1625
Divide by 1.625.
pcuart.inc:206Constant UART.EXCR2.PRESL.1
VAL BYTE UART.EXCR2.PRESL.1
Divide by 1.0.
pcuart.inc:207Constant UART.EXCR2.BGLOCK
VAL BYTE UART.EXCR2.BGLOCK
Baud rate divisor lock.
pcuart.inc:211Group UART.TYPE
Known UART types.
pcuart.inc:212Constant UART.TYPE.UNKNOWN
VAL INT UART.TYPE.UNKNOWN
Unknown UART type (assume basic).
pcuart.inc:213Constant UART.TYPE.8250
VAL INT UART.TYPE.8250
Standard 8250 compatible UART.
pcuart.inc:214Constant UART.TYPE.16550
VAL INT UART.TYPE.16550
16550.
pcuart.inc:215Constant UART.TYPE.16550A
VAL INT UART.TYPE.16550A
16550A.
pcuart.inc:216Constant UART.TYPE.16450
VAL INT UART.TYPE.16450
16450.
pcuart.inc:217Constant UART.TYPE.16650
VAL INT UART.TYPE.16650
16650.
pcuart.inc:218Constant UART.TYPE.16C950
VAL INT UART.TYPE.16C950
Oxford Semiconductor 16C950.
pcuart.inc:219Constant UART.TYPE.16850
VAL INT UART.TYPE.16850
XR16C850.
pcuart.inc:220Constant UART.TYPE.16654
VAL INT UART.TYPE.16654
16654.
pcuart.inc:221Constant UART.TYPE.16650V2
VAL INT UART.TYPE.16650V2
16650 version 2.
pcuart.inc:222Constant UART.TYPE.NS16550A
VAL INT UART.TYPE.NS16550A
NS 16550A.
pcuart.inc:223Constant UART.TYPE.16750
VAL INT UART.TYPE.16750
16750 UART.
pcuart.inc:226Group UART.CAP
UART capabilities.
pcuart.inc:227Constant UART.CAP.NONE
VAL INT UART.CAP.NONE
UART has no special capabilities.
pcuart.inc:228Constant UART.CAP.FIFO
VAL INT UART.CAP.FIFO
UART has FIFO.
pcuart.inc:229Constant UART.CAP.EFR
VAL INT UART.CAP.EFR
UART has EFR.
pcuart.inc:230Constant UART.CAP.SLEEP
VAL INT UART.CAP.SLEEP
UART has IER sleep.
pcuart.inc:231Constant UART.CAP.AFE
VAL INT UART.CAP.AFE
UART has MCR-based hardware flow control.
pcuart.inc:232Constant UART.CAP.UUE
VAL INT UART.CAP.UUE
UART needs IER bit 6 set (Xscale).
pcuart.inc:233Constant UART.CAP.NS
VAL INT UART.CAP.NS
National Semiconductor UART (additional features).
pcuart.inc:236Group UART.PARITY
UART parity settings.
pcuart.inc:244Group UART.STOP
UART stop bits settings.
pcuart.inc:249Group UART.WLEN
UART word-length settings.
serial.occ:56Process serial.driver
PROC serial.driver (CT.DRIVER? link, SHARED LOG! log, VAL []BYTE options)
Serial-port infrastructure process.
Parameters:
CT.DRIVER? |
link |
Link to parent driver. |
SHARED LOG! |
log |
System log channels. |
VAL []BYTE |
options |
Driver options. |